 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| AP1601 ms 1454 - e - 0 1 1 2 01 2 / 0 8 description the AP1601 is a control ic which is suitable for led lighting application s to supply a current to led s from an ac power source. the AP1601 can be configured as a dcm isolated flyback circuit or as a ccm non - isolated step down choppe r circuit (buck converter) . also, led lighting application s for a p hase control dimmer (hereinafter called triac dimmer) can be constructed with fewer external components on the application board. many functions for led lighting application s are integrate d into the ap1610 such as : 30v pre - driver, triac dimmer control circuit, constant current circuit using the auxiliary winding of the transformer, noise reduction circuit during dcm operation and various protection functions. the AP1601a also has an indepen dent analog dimming pin and a pwm dimming pin for non - triac dimming systems, providing a low cost led application with a wide range of dimming configurations. features ? led driver with reduced external component count . ? constant current control using auxi liary winding of transformer. (no photo - coupler is required) ? rectified ac voltage up to 275v can be applied for start - up / start up by rectified ac voltage up to 275v. ? current control functions ? dcm flyback: control with switching frequency changed by pea k current on primary side and forward voltage of leds. ? ccm chopper (buck): control with off - time changed by peak current on primary side and forward voltage of leds. ? analog dimming by external dc input. (current peak control) ? pwm dimming by external pulse input. ? triac dimmer compatible , built in current supply circuit ? protection circuits ? led open protection. ? over current protection when transformer is shorted. ? under voltage lockout . (uvlo) ? thermal protection . ? package ? 14pin sop . application ? indoor led lig hts up to 40w maximum ? led down light . ? led bracket . ? led ceiling light. AP1601 led l ight control ic, dimmer compatible
AP1601 ms 1454 - e - 0 1 2 2 01 2 / 0 8 block diagram figure 1. AP1601 block diagram block description bleeder by monitoring the bleed pin voltage and swvdd condition, a bleed from hv pin or vdd charge on/off is cont rolled . 5v regulator 5v for internal circuits is generated from vdd pin. swvdd by monitoring vdd pin voltage and if vdd voltage is deficient, a signal to bleeder is output. reset by monitoring 5v regulator startup condition, malfunction of internal circ uits using 5v is prevented. uvlo by monitoring vdd pin voltage, driver output is held to gnd level and 5v regulator is inactivated so that malfunction at low voltage is prevented . ovp over voltage detection circuit on vdd pin. driver driver for external n type mosfet. tsd overheat detection circuit. ocp over current detection circuit for external mosfet. clk internal clock / off - time generation circuit. zcd bottom voltage detection circuit. hold by sampling the auxiliary winding voltage , which is pr oportional to the vf of the led s , a internal voltage is generated, which compensates for the clk frequency on dcm or the off - time on ccm. leb leading edge blank circuit depletion mosfet hv vdd bleed 5v regulator swvdd uvlo bleeder ovp reset driver tsd ocp x5 s hold clk zcd ld vfc osc pw m gnd cs out ref 2.5v 1.2v leb sel - - + r q s r q driver 2.8ua 2ua 100k 2m AP1601 ms 1454 - e - 0 1 3 2 01 2 / 0 8 pin configuration/description figure 2 . pin configuration of AP1601 no. pin i/o description 1 ld i analog dimming signal input pin built in pull - up circuit (pulled by 2ua(typ) current source) 2 pwm i pwm dimming signal input pin built in p u ll - down resistor (2m(typ)) 3,10 gnd pwr ic ground pin this pin is connected to the frame for heat transfer. 4 ref o internal regulator output pin for stability, please connect a capacitor of 0.1uf. 5 bleed i threshold set pin of the current source for triac dimmer. while vbleed pin voltage is less than (1.2v(typ)) , a signal is sent to the internal control circuit. built in pull - up circuit. (pulled by 2 .8 ua(typ) current source) 6 nc - nc pin please do not connect to any pins. this pin is open . 7 hv i current source pin for triac dimmer. pr ovide a current to gnd to prevent malfunction of triac dimmer operation. during start up and when the external power supplied to vdd is deficient, the power supplied to the vdd pin has priority over the bleed control signal. 8 vdd pwr ic power input pin. for voltage stability , please connect a capacitor from 1uf to 10uf. 9 out o gate drive pin for external mosfet. 1nf capacitor can be charged in 50ns(typ) . built in pull down resistor (100k(typ)) . 11 cs i external mosfet current detection pin. peak current is set connecting resistor between the source pin and gnd. this pin also detects over current. 12 sel i fixed frequency mode / fixed off - time mode switch pin. 13 vfc i switching f requency/ off - time compensation input pin. this pin also detects bottom voltage (when sel=ref) 14 osc o switching frequency / off - time set pin resistor should be connected to gnd ( detail s are described later) * ( i/o) i: input pin, o: output pin, pwr: pow er pin, - : n/a h v v d d r e f b l e e d g n d o s c c s l d p w m o u t s e l v f c g n d n c 1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 AP1601 ms 1454 - e - 0 1 4 2 01 2 / 0 8 absolute maximum ratings ta=25 ? c unless otherwise specified. parameter symbol min. max. unit hv (*1) v hv_max - 0.3 450 v vdd (*1) v dd_max - 0.3 30 v bleed, out (*1,*2) v mv_max - 0.3 v dd_max +0.3 v ref (*1) v ref_max - 0.3 6.0 v cs, p wm, ld, osc, vfc, sel (*1,*3) v lv_max - 0.3 v ref_max +0.3 v junction temperature tj - 40 125 ? c storage temperature tstg - 55 150 ? c power dissipation (*4) p d 1.5 w note: *1 all voltages refer to gnd pin (gnd) as zero (reference) voltage . *2 if vdd_m ax exceeds 29.7v, the maximum value is limited to 30v. *3 if vref_max exceeds 5.7v, the maximum value is limited to 6v. *4 25.4mm25.4mm1.6 mm fr4 board, 50% gnd copper area, ta=25 ? c . pd must be decreased at the rate of 15mw/ ? c for operation above 25 ? c the maximum ratings are the absolute limitation values with the possibility of damaging the ic. when the operation exceeds these standards the specifications cannot be guaranteed. recommended operating condition parameter symbol min. typ. max. unit operating voltage range (*5,*6) v dd 10 20 v hv voltage (*5) v hv 400 v bleed, cs, pwm, ld, osc, vfc, sel (*5) gnd v ref v operating temperature range (*7) t a - 40 105 c *5 all voltages refer to gnd pin (gnd) as zero (reference) voltage. *6 vdd i s applied after uvlo is released . (uvloh 17.6v (typ) ) *7 in high power applications or low thermal conductivity of the application board or if both are true, the maximum ambient temperature value need s to be lowered not to exceed maximum tj value. AP1601 ms 1454 - e - 0 1 5 2 01 2 / 0 8 electr ical characteristics ta=25 ? c , hv=open , vdd=15v, ref=0.1uf, pwm=vref, sel=gnd , r15=200k, vfc=vref unless otherwise specified. vdd is applied after uvlo is released, which is after the hv voltage (18v typical) is applied. 1. supply current parameter sy mbol specification unit note min typ max supply current i dd1 2.0 3.0 ma pwm= v ref cs=0.6v out=no load (*8) i dd2 1. 4 2.1 ma p wm =0v (*8) 2. control circuits parameter symbol specification unit note min typ max operating mode sel voltage h v selh 4.5 v fixed frequency mode, bottom voltage detection (dcm) sel voltage l v sell 0.5 v fixed off - time mode (ccm) current control cs pin control voltage v peak 475 500 525 mv ld= v ref leading edge blank t leb 200 3 0 0 45 0 n s pwm= v ref , cs=0. 6 v ld p in input voltage v ld 0.3 2.65 v ld pin input voltage range while analog dimming v ld 2 3.0 v analog dimming unused pwm voltage h v pwmh 1.5 v switching operation pwm voltage l v pwml 0.5 v cease switching switching frequency 1 f op1 95 100 105 khz r 15 =100k vfc =1v, sel= v ref (dcm) switching frequency 2 f op2 135 150 165 khz r 15 =100k vfc =1.5v, sel= v ref (dcm) switching frequency 3 f op3 40 50 60 khz r 15 =100k vfc =0.5v, sel= v ref (dcm) off - time t osc 9 10 11 u s r 15 =100k vfc =1v, sel=gnd (ccm) vfc zero cross detection voltage v thzc 0.05 0.1 0.15 v sel= v ref (dcm) gate drive out pin output voltage h v outh vdd - 0.3 vdd - 0.18 vdd - 0.05 v i out = - 10ma (*8) out pin output voltage l v outl 0.05 0.12 0.2 v i out = 10ma (*8) rising time t r 50 100 n s out load :1000 pf falling time t f 50 100 n s out load :1000pf triac dimmer current source c urrent source threshold voltage v bleed 1.0 1.2 1.4 v bleed pin resistor 1 ( hv - gnd ) r o nh1 450 710 hv =20ma (*8) resistor 2 ( hv - gnd ) r onh2 900 1350 hv =10ma, t j =125 (*8) AP1601 ms 1454 - e - 0 1 6 2 01 2 / 0 8 electrical characteristics (the rest) ta=25 ? c , hv=open, vdd=15v, ref=0.1uf, pwm=vref, sel=gnd, r15=200k, vfc=vref unless otherwise specified. vdd is applied after uvlo is rele ased, which is after the hv voltage (18v typical) is applied. parameter symbol specification unit note min typ max startup circuit operating startup voltage uvloh 15.5 17.6 19.8 v v dd voltage rising operating shutoff voltage uvlol 5.6 6.4 7.2 v v dd voltage falling startup current source threshold voltage 1 v ddh 9.1 10.3 11.6 v v dd voltage rising startup current source threshold voltage 2 v ddl 7.8 8.8 9.9 v v dd voltage falling startup current i ddch - 12 - 8.5 - 5.0 ma v hv =100v, v dd =6.5v (*8) intern al regulator ref voltage v ref 4. 9 5.0 5. 1 v ref current : 0ma (*8) ref dropout voltage v drop 20 100 mv ref current : - 7ma (*8) protection circuit s thermal protection tsd 130 150 170 ? c design assurance value thermal protection release temperature tsd ? c design assurance value cs over current detection ocp 720 800 880 m v latch off vdd over voltage detection ovp 23 26 29 v latch off note: * 8 current definition: flow to the p in is plus, flow out from the p in is minus. AP1601 ms 1454 - e - 0 1 7 2 01 2 / 0 8 operation 1) oper ation outline the AP1601 operates directly from a rectified ac voltage supply ( 100 ~2 40 v) . it has 2 selectable operati ng modes, a dcm flyback type and a ccm chopper type (buck) constant current driver. switching frequency , set by an external resistor , can be automatically adjusted depending upon the led vf value . the led current variation related to the led vf variation will be minimized. furthermore , the led current is controlled constant on chopper type (buck) even when the input voltage varies. dimming c an be done using a peak current control method , a pwm pulse current control method , or switching frequency adjustment independently or in combination . (in the following description , the symbol s and number s on the external parts refer to figure 22. a t ypica l isolated flyback application circuit for triac dimming is shown later ) 2) operation 2 - 1) operation mode the AP1601 can select from 2 different operation modes . the mode is determined by the voltage of the sel pin. operation mode sel pin voltage exter nal mosfet control out pin h ref the out pin is switched from h to l by detecting peak voltage on the cs pin after rising of the internal clk signal determined by the osc pin voltage : if the vfc pin voltage becomes lower than the bottom voltage de tection level ( AP1601 ms 1454 - e - 0 1 9 2 01 2 / 0 8 figure 5. dcm flyback mode wave form the AP1601 fixed frequency mode is using the t1 auxiliary winding, waiting until the q1 drain voltage falls off after the secondary current becomes ze ro, then move s to the next cycle. approximation s of t on , t off1 time requirement in figure 5 are; next, the t off2 period is the time for compensation to the led v f variation. by detecting the bottom voltage using the v thzc threshold , t off2 ( for example ) is defined by (b) or (c) if each switching is observed . h owever , the internal clk operates at a constant cycle while v vf is maintained constant , and t off2 will be an ideal period if averag ed for a sufficient ly long time (e.g. , 10ms for 100khz switching frequency) . the shortest amount of the t off2 time is between (a) and (b) shown in figure 5. this is the reason why the drain voltage doesn t fall off immediately due to resonance caused by the primary side induc tance (lp) of the transformer and a parasitic capacitor (c lump ) between q1 drain and gnd. approximation of t off2 s minimum time is as follows . if the compensation for led v f variation is corr%, the approximation of the set value is as follows. e.g. when vin=100v, l p =680uh, i lp =0.7a, v f =30v, v fd5 =0.7v, n=0.4, c lump =100pf and corr%=30% , t on =4.76us, t off1 =6.2us, t off2_min =0.82us , and t off2 is calculated to be 3.53us . from this, when the set frequency is approx imately 69khz and e nergy transmission efficiency of the transformer is 0.9, the led average current will be approximately 337ma. when the frequency needs to be higher without affecting to the other parameter s , t off1 should be shorter by changing the win ding ratio (n) lower . however, when the winding ratio (n) decreases, transformer transmission efficiency tends to be less, and the AP1601 shortest t off1 time is designed at 2us, therefore, please do not be shorter than that in steady state. in actual ac po wer source input, vin is the absolute value of the sine wave , peak current is proportional to vin until a certain voltage level, please calculate using the time of the half cycle of th e ac power frequency (50hz/60hz). ts t on t off1 t off2 (a) out v ds (b) i lp i ls (c) t on t off2 out on off d 5 off off i lp 0 i ls 0 0 t off1 off on 0 t l v p in ? t l v v n i s fd f peak lp ? ? ? 5 _ peak lp in p on i v l t _ ? ? n i v v l v v l n i t peak lp fd f p fd f s peak lp off ? ? ? ? ? ? ? _ 5 5 _ 1 lump p off c l t ? ? ? ? min _ 2 % ) ( min _ 2 1 2 corr t t t t off off on off ? ? ? ? AP1601 ms 1454 - e - 0 1 10 2 01 2 / 0 8 the AP1601 switching frequency on fixed frequency mode is roughly deter mined by r15 connected between the osc and gnd and the sampling voltage on the vfc pin in normal state as follows. figure 6 sh ows the relationship between the vfc pin voltage wave form and the voltage sampling point, as well as between the v vfc voltage and the internal clk frequency when using r 15 =100k figure 6. v vfc sampling point and relationship between voltage and internal clk frequency at r 15 =100k figure 7 shows an image of the compensation for the led current changed by the vfc pin waveform that is proportional to the variation of the led v f . the left side waveforms are for high v f , the right side are for low v f . figu re 7. average current compensation on switching frequency changed by v vfc voltage change. when the led v f increase s , a voltage that is proportional to the secondly winding and the auxiliary winding is output as the auxiliary winding voltage immediately aft er the mosfet turns off. the switching frequency is changed due to the osc pin voltage changes that are according to the sampling voltage divided by a resistor divider from the auxiliary winding. this changes the power. approximation of v vfc is given by th e following equation. ? ? ? ? ? ? ? ? ? ? ? k r k v v v khz r v v f vfc vfc sw 400 20 5 . 1 5 . 0 10 ] [ ] [ 15 7 5 1 waveform of vfc terminal sampling point(v vfc ) 0 1 2 3 4 5 50 100 150 200 250 f clk (khz) v vfc (v) toff delay vfc t , gnd and pin osc between connedted k a of case in ? 100 i ls vfc average current expand toff ? ? ? ? ? ? ? ? ? ? ? ? ? ? 2 6 5 12 11 12 d c d s b vfc v v v n n r r r v AP1601 ms 1454 - e - 0 1 11 2 01 2 / 0 8 n s n b are respectively the number of the second ary winding and the auxiliary winding of transformer t 1 . the v vfc voltage is reflected in the osc pin voltage and is in the range from 0.2v (typ) to 2v (typ ) ; if i t is less than 0.2v , the osc voltage will be 0.2v , and if it is more than 2v (typ) , the osc pin voltage will be 2v (typ) . (refer to figure 6.) as the graph in figure 6 show s , v vfc which is the center of v f variation should be 1v to compensate led v f variati on. when the voltage is 1v, the ratio of r 11 and r 12 is approximately given by the following formula. r 11 s selectable range is from 5k to 100k . the number of transformer auxiliary winding is determined by the v dd voltage. the vdd pin voltage , v dd in stable operation , is approximately given by the following formula, when the led v f variation is expected to be 30% , the v dd voltage , which is the center of the variation , should be set approximately to 15v to be operating within the v dd operating voltage range. bottom voltage detection ( v thzc ) figure 8 shows the schematic of bottom voltage detection on the vfc pin . as the figure is shown, the rising edge of the internal ckl is the regular interval ( =t s ) however, by the bottom voltage detection function, clk is kept on high level until vfc becomes less than v thzc as shown in the dashed line box a in the figure. if t he vfc pin is already less than v thzc at the internal clk rising edge, the out pin should be v outh level. however, there are the following exceptions in order to prevent malfunction. if internal clk rises while the out pin is v outh level, the clk will no t be maintained. t blank period (700ns, design value ) i mmediately after the out pin becomes v outl level, zcd (internal) shown in figure 8 is held as low level and v thzc detection on the vfc pin is disabled. figure 8. bottom voltage detection (vthzc) b y this bottom voltage detection function, the external mosfet is able to turn on in low voltage and current level, and a noise - reduction effect can be expected. furthermore , switching - loss can be reduced and power efficiency will be improved. ? ? 1 2 6 5 12 11 ? ? ? ? ? d c d s b v v v n n r r ? ? 3 4 6 5 r i v v v n n v dd d c d s b dd ? ? ? ? ? ? out v ds vfc clk(internal) v thzc a ts ts ts zcd(internal) AP1601 ms 1454 - e - 0 1 12 2 01 2 / 0 8 2 - 2 - 2) fixed off - time mode ccm chopper (buck) circuit using the AP1601 fixed off - time mode controls the peak current and the bottom current of the coil constant (constant ripple control). by this control, the switching frequency is changed for input voltage and led v f variation. figure 4 shows the current path of a chopper (buck) circuit, current , or voltage waveform for each part. the primary side of the transformer is controlled by the out pin which turns the mosfet (q 1 ) on and off. the current path when the out pin t urns on ( v outh ) is vin led l p q 1 r 13 gnd . the current path when the out pin turns off is l p d 5 led . the peak current of l p when the out pin turns on is controlled by turning the out pin off and detecting the cs pin voltage. the bottom current should be set by the transformer primary winding self inductance, led v f , off - time ( t off ). if the diode d v can be ignored (v fd5 < AP1601 ms 1454 - e - 0 1 14 2 01 2 / 0 8 pwm dimming is available using the pwm pin. pwm diming is controlled by appl ying an external pulse to the pw m pin , which is referenced to gnd. the a llowable voltage range on the pwm pin is from 0 to v ref (5v (typ) ) and up to 2khz pwm pulse signal may be used . by holding the pwm pin voltage to less than v pwml (less than 0.5v), t he out pin can be fixed to off level ( v outl ) 2 - 2 - 5) leading edge blank and shortest on time of out pin the AP1601 does not detect current by masking for a certain period after the nch mosfet turns on. this is called leading edge blank ( t leb ). it means, the voltage on the cs pin is ignored d uring this period. the period is necessary to avoid instantaneously turning o ut off and on or cea sing the switching by the over current protection function when the reverse recovery current of diode d 5 or the discharge current from parasitic capacitor is l arge while q 1 is on. however, all current detection on the cs pin is started after t leb , the shortest on time of q is limited by the leading edge blank. worst case of t leb at 25 ? c is 450ns . figure 11. cs pin voltage leading edge blank thus, input volta ge range, output voltage range, ripple width and the transformer primary side inductance should be determined to guarantee that the on - time during the operation is always more than t leb . on - time is approximately given by the following formula and limited by t leb . flyback circuit; chopper (buck) circuit; t d_mos represents a delay time until mosfet ( q 1 ) turns off after the out pin is turned off . if on - time is less than the delay time during the operation co ndition, the peak current will be higher than the set value and the average current will also shift higher. furthermore, if the cs pin voltage after t leb becomes higher than the over current protection threshold voltage, the switching will be ceased. 2 - 3 ) gate drive the out pin is the gate driver output, which can drive 1000pf capacitor at 50ns (typ) of raising and falling time by using the vdd voltage. 2 - 4) triac dimming the AP1601 has a built - in circuit which is compatible with triac dimmer s . out cs mask area t on t off t leb t leb mos d leb mos d in peak lp p on t t t v i l t _ _ _ ? ? ? ? ? mos d leb mos d out in bottom lp peak lp p on t t t v v i i l t _ _ _ _ ) ( ? ? ? ? ? ? ? AP1601 ms 1454 - e - 0 1 15 2 01 2 / 0 8 figure 12. triac dimmer as shown in figure 12, a triac dimmer for resistive loads like incandescent lamps performs dimming by changing the input power which is controlled by cutting any angle of the phase for the input sine - wave. the time constant determined by the variable resistor (vr) turns the triac (bidirectional thyristor) on in the dimmer and supplies the power to the load. the triac sustains its conduction once turned on until the current to sustain the operation becomes lower than the thre shold. the input current of the switching circuit becomes discontinuous because the diode - bridge turns off when it is below the input capacitor (c1) voltage . AP1601 is a switching power supply, but to be compatible with a triac dimmer, it needs to emulate a resistive load for the triac dimmer (between the bleed period and reset period in figure 12). AP1601 has a bleed current function for efficiency reasons, which supplies a current from the db1 (diode - bridge) plus pin to the minus pin through a resistor i n the ic only while the triac dimmer needs a current to stay on. the function allows normal operation for triac dimmer applications. setting of bleed current as a triac dimmer supporting current is shown below. v bleed to determine when bleed current flows is 1.2v( typ ) , on resistance of the hv pin to sink bleed current is 450 ( typ ), if maximum bleed current is 20ma, the resistor to be connected between the bleed pin and the hv pin is approximately given by the following formula. resistors r 5 , r 6 to determin e when bleed current flows are given as follows. if, in case of v rf_th to determine when bleed current flows is 35v and r 5 =510k , r 6 is, resistor r 2 connected on the hv pin to limit current is given as follows. 2 - 5) startup circuit the AP1601 has a startup circuit which is supplied power from the high voltage hv pin . b y using the auxiliary winding (l b ) of the transformer, the external device count relevant to startup can be further reduced, this also, allow s power loss after startup to be reduced significantly. the internal startup circuit is also connected to the vdd pin through a diode as shown below, and the vdd pin voltage increases in accordance with the applied input voltage. when the vdd pin voltage r eaches the operating startup voltage (u vloh =18v typical), the internal circuit is activated and switching is started. the internal startup circuit is cut off from the hv pin in this state, and the power to the internal circuit is supplied directly from the auxiliary winding of the flyback transformer to the vdd pin, which is more efficient. incandesent bulb load: rl ac input triac dimmer circuit ac ? ? rl triac diac vr c triac { 7 triac {??R bleed g hold g bleed period latch period hold period reset period voltage of both ends of bulb (rl) that is controlled by the phase of triac dimmer. ] [ 18 2 . 1 35 510 2 . 1 2 . 1 5 2 . 1 6 _ ? ? ? ? ? ? ? ? k v v r v r th rf ] [ 3 . 1 20 20 450 2 _ ? ? ? ? ? ? k ma ma v r th rf AP1601 ms 1454 - e - 0 1 16 2 01 2 / 0 8 figure 13. startup circuit red: vdd pin voltage (left axis), green: led anode voltage (left axis), blue: input voltage (vrf: right axis) f igure 14. waveform at startup figure 14 shows the voltage waveform immediately after power on of an ac100v application. red: vdd pin voltage, blue: primary side input capacitor (c1) voltage, green: output electrolytic capacitor voltage. the left vertical a xis represents the vdd pin voltage and the c6 pin voltage, the right vertical axis is the c1 voltage. in this example, the led is lit approximately 50ms after power on. (condition: input voltage 100vac, c1=0.47uf, c2=10uf, c6=100uf, vout=33v) 2 - 5 - 1) power - on state C initiation of ic operation phase external capacitor, c2 starts charging through the internal startup circuit powered from the hv pin after power on. this charging path will be cut off when the vdd pin achieves operating startup voltage (u vlo h ). when vdd is below the uvlo h voltage, the internal circuits, except some circuits needed for startup, cease operation. 2 - 5 - 2) initiation of ic operation - stable operation phase when vdd pin voltage becomes uvloh, ref will be supplied power from vdd first (charge c 7 ) if ref is rising , the internal reset signal rises , all of the ic circuit s start and the switching operation start s . however, usually , the voltage of electrolytic capacitor ( c 6 ) connected on the secondary side is lower than v dd immediately afte r switching starts , therefore , power from the auxiliary winding to the vdd pin will not be supplied, so , the switching operation is performed by consuming the power from charged capacitor ( c 2 ) . when the voltage of electrolytic capacitor ( c 6 ) connected on t he secondary side rises enough, power from the transformer auxiliary winding to the vdd pin becomes sufficient and v dd will be stable. bleed current limit c2 vdd hv en lb db1 vline r2 r3 d4 t1 v c6 volatage v c1 voltage inactivate startup circuit led output pin voltage led on uvlo_h vdd pin voltage pin voltage (v) input voltage (v) power supplied from the transformer auxiliary winding phase switching constant current charging time (ms) AP1601 ms 1454 - e - 0 1 17 2 01 2 / 0 8 to prevent the vdd pin voltage from becom ing lower than uvlol w hen the power from the auxiliary winding is deficient, co nstant current charging from the hv pin to the vdd pin is properly performed to maintain the vdd voltage to a certain voltage range by using swvdd monitoring of the vdd pin voltage. the startup circuit that connect s between the hv pin to the vdd pin is ena bled at the swvdd lower limit voltage (v ddl : 8.8v (typ) ) , and disabled at the upper limit voltage (v ddh : 10.3v (typ) ) . if there is no power from auxiliary winding and power continue s to be intermittently suppl ied from the hv pin to vdd, the ic generates heat due to the voltage drop from the input voltage to the v dd voltage (8.8v (typ) 10.3v (typ) ) . please adjust the hv pin voltage to less than 120v rms by resistor r 2 connected between the hv pin and vrf when the hv pin voltage exceeds 120v rms . time chart in regard to startup circuit is shown in figure 15. figure 15. image of st artup circuit operation (time chart) 2 - 6) internal regulator the AP1601 has a built in 5v regulator to supply voltage from the vdd pin to the internal circuit s , and if thermal conditions are met , a maximum of a 7ma current can be supplied to external cir cuits from the ref pin. for voltage stability , please connect a 0.1uf capacitor (class b) between the ref pin and gnd. vdd swvdd(internal) uvlo(internal) ref reset(internal ) out uvloh v ddl v ddh vdd powered from the auxiliary winding is stable. power off AP1601 ms 1454 - e - 0 1 18 2 01 2 / 0 8 3) protection function protection function operation shut - off state detection condition release condition thermal protection if the ic temperature exceeds the detection condition, the out pin turns to gnd level. cease d river auto - release ic junction temp. 150 ? c 65 ? c down from detection temp . over current if an over current flows to the external mosfet, the out pin turns to g nd level. cease d river latch off cs pin voltage after t leb 0.8v (typ) *1 over voltage if led is open or led v f is high, the out pin turns to gnd level. cease d river l a tch off vdd pin voltage 26v (typ) *1 uvlo to prevent malfunction of the ic, the out pin is fixed to gnd level and cease 5v regulator. cease all auto - release when vdd pin voltage decreasing 6.4v (typ) 17.6v (typ) note: *1. in order to release the latch off state, please apply a voltage of less tha n uvlol for at least 10ms to the vdd pin. # when the ref pin is shorted to gnd, the ic prevents heat generation by limiting in ternal regulator m aximum current to 40ma (design value) . if ambient temperature is high or the hv pin voltage is high or if both are true, the junction temperature may exceed the absolute maximum rating. if the rating is exceeded, the specification can not be guaranteed. 3 - 1) thermal protection to prevent thermal runaway of the ic, the junction temperature is always monitored and the ic operation is controlled. when the junction temperature exceeds t sd (design value is 1 5 0 c typical), switching stops. when the junction t emperature goes below the thermal release temperature ( tsd , 65 c (typ) ) , switching restarts. once the thermal protection is activated, the specification can not be guaranteed. 3 - 2) over current protection the cs pin voltage is monitored after turning the mosfet on and after the l eading edge blanking period ( t leb :300ns (typ) ) . if the cs pin voltage is at the ocp voltage (0.8v typical), switching stops and is latched. for example, when the cs pin voltage is 0.5v and the current is 500ma, the ocp level reaches 800ma. the application circuit is protected when the primary winding, the secondary winding, or the auxiliary winding is shorted. for releasing the over current protection , please apply a voltage of less than uvlol for at least 10ms to the vdd pin. 3 - 3) over voltage protection the vdd pin voltage is monit ored, and if the voltage exceeds the ovp voltage (2 6 v typical), switching stops and is latched. it typically functions as an open protection for secondary side where leds are connected. for releasing the over voltage protection, please apply a voltage of l ess than uvlol for al least 10ms to the vdd pin. 3 - 4) uvlo under voltage lockout. the circuit provides an on signal to the internal circuits when the vdd pin voltage is higher than uvlo h (1 7.6 v typical) and an off signal when the vdd pin is lower than uvl o l (6. 4 v typical). if the vdd pin voltage is lower than the uvlo l voltage , the ic stops switching. if the hv pin voltage is high enough, the vdd pin is provided a current through the internal startup circuit to reach uvlo h and restart the ic. AP1601 ms 1454 - e - 0 1 19 2 01 2 / 0 8 characteri stics 1) temperature dependency figure 16. uvlo voltage figure 17. vref voltage figure 18. peak current detection voltage (ld=ref) figure 19. leading edge blank figure 20. switching frequency (sel=vref) figure 21. equivalent r value hv - gn d (i hv =20ma) 0 5 10 15 20 -40 -20 0 20 40 60 80 100 ta [ ] uvlo [v] uvlh uvll 4.8 4.9 5 5.1 5.2 -40 -20 0 20 40 60 80 100 ta [ ] v ref [v] 0.45 0.475 0.5 0.525 0.55 -40 -20 0 20 40 60 80 100 ta [ ] v peak [v] 200 250 300 350 400 -40 -20 0 20 40 60 80 100 ta [ ] t leb [ns] r 15 =100k,v vfc =1v 80 90 100 110 120 -40 -20 0 20 40 60 80 100 ta [ ] fsw[khz] 200 400 600 800 1000 -40 -20 0 20 40 60 80 100 ta [ ] r onh [ ] AP1601 ms 1454 - e - 0 1 20 2 01 2 / 0 8 application example figure 22. typical i solated flyback circuit compatible with triac dimmer figure 23. typical non - isolated chopper circuit compatible with triac dimmer * the above figures are for reference only. * a varistor to absorb a surge voltage, a common mode choke coil to reduce noise, across the line capacitor and such are not shown above. * in order to prevent a large current from continuously flow ing when the ic has failed due to incorrect wiring during assembly or abnormal pulse noises and so forth, please place the appropriate fuse to meet the appropriate standards in the appropriate place in the circuit. l n dimmer v1 f1 db1 d1 r1 c1 c2 c4 c6 d2 d3 d4 d5 r3 r4 r13 r11 r12 r14 +out - out t1 lp lb ls ld pwm gnd ref bleed hv vdd out gnd cs sel osc vfc v1 r2 r5 r6 r8 r7 r9 r10 r15 r ef c7 v f vrf vin u1 q1 c 9 l n dimmer v1 f1 db1 d1 r1 c1 c2 d2 d 5 d4 r3 r13 r11 r12 +out - out t1 lp lb ld pwm gnd ref bleed hv vdd out gnd cs sel osc vfc v1 r2 r5 r6 r8 r7 r9 r10 r15 c7 c8 q1 u1 vin vrf c9 AP1601 ms 1454 - e - 0 1 21 2 01 2 / 0 8 package and marking 1) dimension (14 pin sop) [ unit :mm] figure 24. package outline AP1601 ms 1454 - e - 0 1 22 2 01 2 / 0 8 2) marking figure 25. marking information upper product name ? descriptions of external ci r cuits, application circuits, software and other related info r mation contained in this document are provided only to illustrate the operation and application examples of the semiconductor products . you are fully responsible for the incorporation of these external circuits, application circuits, software and other related information in the design of your equipment s . asahi kasei microdevices corporation (akm) assumes no responsibility for an y loss e s incurr e d by you or third parties arising from the use of these information herein . akm assumes no liability for infringement of any patent, intellectual property, or other rights in the application or use of such information contained herein. ? any export of these products, or devices or systems containing them, may require an export license or other official approval under the law and regulations of the country of export pertaining to customs and tariffs, currency exchange, or strategic materials. ? a km products are neither intended nor authorized for use as critical components note1) in any safety, life support, or other hazard related device or system note2) , and akm assumes no responsibility for such use, except for the use approved with the express w ritten consent by representative director of akm. as used here: note1) a critical component is one whose failure to function or perform may reasonably be expected to result, whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing it, and which must therefore meet very high standards of performance and reliability. note2) a hazard related device or system is one designed or intended for life support or maintenance of safety or for applications in medicine , aerospace, nuclear energy, or other fields, in which its failure to function or perform may reasonably be expected to result in loss of life or in significant injury or damage to person or property. ? it is the responsibility of the buyer or distributor of akm product s, who distributes, disposes of, or otherwise places the product with a third party , to notify such third party in advance of the above content and conditions, and the buyer or distributor agrees to assume any and all responsibility and liabili ty for and hold akm harmless from any and all claims arising from the use of said product in the absence of such notification. important notice |
Price & Availability of AP1601
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |